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Ventana Veyron V2: Revolutionizing Data Processing

Ventana introduces the Veyron V2 RISC-V processor, strategically catering to data center operators and hyperscalers. This iteration, following the Veyron V1 chiplets, boasts an IO hub and accelerators aligned with the UCI-Express chiplet connectivity standard, providing an impressive 192 cores per socket.

To illustrate, six V2 chiplets, each housing 32 cores, seamlessly integrate with the IO hub via UCI-Express. This configuration, enhanced by domain-specific acceleration, showcases the processor’s versatility. Additionally, the IO hub facilitates connectivity with memory and components through DDR5 and PCIe 5.0 controllers. Notably, organizations have the flexibility to opt for HBM3 controllers in lieu of DDR5, as per the insights shared by Next Platform.

Ventana Veyron V2: Revolutionizing Data Processing

Ventana’s Cutting-Edge Veyron V2 RISC-V Processor Unveiled

Hyperscalers are turning their focus to Ventana’s latest innovation. Ventana’s decision to release the next generation, swiftly following the Veyron V1 launch this year, is attributed to the earlier reliance on the Bunch of Wires (BoW) standard for chiplet interconnection, the best option at that time.

However, the landscape shifted when Intel introduced the UCI-Express standard in March last year, prompting Ventana to promptly adopt this superior chiplet connectivity technology in its subsequent chip iteration.

A notable feature of this advancement is its benchmarking prowess. Ventana’s data highlights the Veyron V2 RISC-V CPU’s impressive superiority in throughput, effortlessly outperforming competitors like the 64-core Arm Neoverse V2, 56-core Intel Xeon SPR 8400+, 96-core AMD EPYC Genoa 9654, and even the formidable 12-core AMD EPYC Bergamo 9754 CPUs.

Remarkably, the Ventana Veyron V2 processor exhibits a remarkable 23% increase in integer throughput compared to AMD’s Bergamo CPU, renowned for its high-speed processing. This positions the Veyron V2 as a compelling and competitive choice for businesses.

The foundational Veyron V2 model features four chiplets, delivering 128 cores and eight DDR5 RAM channels. Scheduled to enter production in the third quarter of the upcoming year, this timeline hinges on the availability of the UCI-Express 1.1 PHY standard, a crucial component in the production process.

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